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#ecp5

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Yann Sionneau<p>SucréLA open-source sw/hw/gateware Logic Analyzer now supports a new exciting feature: x2 and x4 oversampling ! 🥳</p><p>Meaning that while the capture pipeline in the SoC runs @ X MHz on N probes, it can now also sample:<br>* N/2 probes @ 2*X MHz 😍 <br>or<br>* N/4 probes @ 4*X MHz 🥵 </p><p>While continuously streaming data to the host PC running sigrok/PulseView via USB 3.0 ⚡</p><p>Wanna see how this feature has been developed? 🫣 </p><p><a href="https://gitlab.com/yannsionneau/SucreLA/-/commit/fbba0ced39b5d9e3c3f4cf9f92c592914d8afee2" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">gitlab.com/yannsionneau/SucreL</span><span class="invisible">A/-/commit/fbba0ced39b5d9e3c3f4cf9f92c592914d8afee2</span></a> 🤓</p><p><a href="https://mastodon.online/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a> <a href="https://mastodon.online/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>fpga</span></a> <a href="https://mastodon.online/tags/ecp5" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ecp5</span></a> <a href="https://mastodon.online/tags/logicielslibres" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>logicielslibres</span></a> <a href="https://mastodon.online/tags/oshw" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>oshw</span></a> <a href="https://mastodon.online/tags/soc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>soc</span></a> <a href="https://mastodon.online/tags/SucreLA" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SucreLA</span></a></p>
Brad Linder<p><strong>Icepi Zero is an open source FPGA board in a Raspberry Pi Zero-sized form factor (crowdfunding)</strong></p><p>Nearly a decade ago, Raspberry Pi showed that it’s possible to cram a fully functional computer into a tiny package that’s about the size of a stick of chewing gum or about the size of a USB flash drive. In time since the first Raspberry Pi Zero launched we’ve seen a bunch of updates as well as third-party boards with a similar design but different hardware.</p><p>But the Icepi Zero stands out for a […]</p><p><a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/crowdfunding/" target="_blank">#crowdfunding</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/ecp5/" target="_blank">#ecp5</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/fpga/" target="_blank">#fpga</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/icepi-zero/" target="_blank">#icepiZero</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/open-hardware/" target="_blank">#openHardware</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/open-source/" target="_blank">#openSource</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/raspberry-pi-zero/" target="_blank">#raspberryPiZero</a> <a rel="nofollow noopener" class="hashtag u-tag u-category" href="https://liliputing.com/tag/sbc/" target="_blank">#sbc</a></p><p>Read more: <a href="https://liliputing.com/icepi-zero-is-an-open-source-fpga-board-in-a-raspberry-pi-zero-sized-form-factor/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">liliputing.com/icepi-zero-is-a</span><span class="invisible">n-open-source-fpga-board-in-a-raspberry-pi-zero-sized-form-factor/</span></a></p>
Yann Sionneau<p>Do you know some source code out there that programs a Lattice ECP5 FPGA via SSPI interface? (and not jtag nor spi flash nor parallel itf)</p><p>I am trying to implement it and so far I think I'm really close but something does not work yet... 🤔 </p><p>PS: I've read countless times the sysCONFIG manual 😭</p><p><a href="https://mastodon.online/tags/ecp5" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ecp5</span></a> <a href="https://mastodon.online/tags/lattice" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>lattice</span></a> <a href="https://mastodon.online/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>fpga</span></a> <a href="https://mastodon.online/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a></p>
Bo Morgan<p>I started a project page to document my first FPGA project on a long while, mainly so that I don't forget, but could possibly be useful to others... I'll plan to add subsequent projects and make more progress on this one in the next few weeks and months.</p><p>"I bought myself a Radiona ULX3S from CrowdSupply, which includes the 85k Lattice ECP5 FPGA, which can be programmed to simulate the open source 32-bit RISC-V CPU with a completely open source LiteX-yosys-nextpnr, toolchain."</p><p><a href="https://blog.bomorgan.io/hobbies/hardware/fpgas/litex-riscv-ecp5-ulx3s/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">blog.bomorgan.io/hobbies/hardw</span><span class="invisible">are/fpgas/litex-riscv-ecp5-ulx3s/</span></a></p><p><a href="https://kolektiva.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://kolektiva.social/tags/foss" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>foss</span></a> <a href="https://kolektiva.social/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>fpga</span></a> <a href="https://kolektiva.social/tags/litex" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>litex</span></a> <a href="https://kolektiva.social/tags/yosys" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>yosys</span></a> <a href="https://kolektiva.social/tags/nextpnr" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>nextpnr</span></a> <a href="https://kolektiva.social/tags/linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>linux</span></a> <a href="https://kolektiva.social/tags/crowdsupply" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>crowdsupply</span></a> <a href="https://kolektiva.social/tags/radiona" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>radiona</span></a> <a href="https://kolektiva.social/tags/ulx3s" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ulx3s</span></a> <a href="https://kolektiva.social/tags/lattice" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>lattice</span></a> <a href="https://kolektiva.social/tags/ecp5" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ecp5</span></a></p>
Michael J. Brodeur<p><span class="h-card"><a href="https://fosstodon.org/@BrunoLevy01" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>BrunoLevy01</span></a></span> I have several <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FPGA</span></a> boards here. Three of them have an <a href="https://fosstodon.org/tags/ICE40" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ICE40</span></a> FPGA, three of them are Xilinx-based, and the last is the <a href="https://fosstodon.org/tags/ECP5" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ECP5</span></a> evaluation board with an ECP5-5G 85F. Which do you recommend for your FPGA tutorial series? Thank you!</p>