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#risc

2 posts2 participants0 posts today
openSUSE Linux<p>frame.work <a href="https://fosstodon.org/tags/laptops" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>laptops</span></a> + <a href="https://fosstodon.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V = A <a href="https://fosstodon.org/tags/game" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>game</span></a>-changer for <a href="https://fosstodon.org/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a>! This <a href="https://fosstodon.org/tags/oSC25" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>oSC25</span></a> session covers upstream work, <a href="https://fosstodon.org/tags/openSUSE" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>openSUSE</span></a>-specific fixes, packaging, and more. <a href="https://youtu.be/xQ-xmoP0sD4?si=SwIDRZehc0sO6JOG" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">youtu.be/xQ-xmoP0sD4?si=SwIDRZ</span><span class="invisible">ehc0sO6JOG</span></a></p>
Elosha<p>Finally HP 9000 owner 😎 It’s the model 712 <a href="https://chaos.social/tags/pizzabox" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>pizzabox</span></a>. Lets see if I can make this baby shine again! <a href="https://chaos.social/tags/parisc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>parisc</span></a> <a href="https://chaos.social/tags/hppa" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>hppa</span></a> <a href="https://chaos.social/tags/hp9000" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>hp9000</span></a> <a href="https://chaos.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a> <a href="https://chaos.social/tags/unix" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>unix</span></a></p>
st1nger :unverified: 🏴‍☠️ :linux: :freebsd:<p>With the <a href="https://infosec.exchange/tags/Linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Linux</span></a> <a href="https://infosec.exchange/tags/Debian" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Debian</span></a> 13.0 release planned for 9 August, one of the notable fundamental features with this Debian "Trixie" release is now supporting <a href="https://infosec.exchange/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V as an official <a href="https://infosec.exchange/tags/CPU" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CPU</span></a> architecture. This is the first release where RISC-V 64-bit is officially supported by Debian Linux albeit with limited board support and the Debian RISC-V build process is handicapped by slow <a href="https://infosec.exchange/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>hardware</span></a></p><p><a href="https://www.phoronix.com/news/Debian-13-RISC-V-Ready" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/Debian-13-RI</span><span class="invisible">SC-V-Ready</span></a></p>
lopta<p>Distracted by HP PA-RISC. <a href="https://mastodon.social/tags/parisc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>parisc</span></a> <a href="https://mastodon.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a></p>
Pyrzout :vm:<p>Análisis Técnico Comparativo: La Guerra de las Arquitecturas RISC vs CISC y el Déficit Ecosistémico de RISC-V <a href="https://blog.elhacker.net/2025/07/analisis-tecnico-comparativo-arquitectura-risc-cisc.html" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">blog.elhacker.net/2025/07/anal</span><span class="invisible">isis-tecnico-comparativo-arquitectura-risc-cisc.html</span></a> <a href="https://social.skynetcloud.site/tags/arquitectura" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>arquitectura</span></a> <a href="https://social.skynetcloud.site/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a></p>
Tanguy ⧓ Herrmann<p>Who is using a framework computer with RISC-V CPU?</p><p><a href="https://hachyderm.io/tags/FrameWork" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FrameWork</span></a> <a href="https://hachyderm.io/tags/framework13" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>framework13</span></a> <a href="https://hachyderm.io/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://hachyderm.io/tags/laptop" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>laptop</span></a></p>
RSNikhil<p>Reflections on the first "golden age" of computer architecture, 1986-1996, after which <a href="https://mastodon.acm.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> ruled, by John Mashey, a key player of that era. <a href="https://mastodon.acm.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://mastodon.acm.org/tags/MIPS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>MIPS</span></a> <a href="https://mastodon.acm.org/tags/SPARC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SPARC</span></a></p><p><a href="https://techviser.com/wp-content/uploads/2022/06/Mashey.IEEE_.Micro_.2022.pdf" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">techviser.com/wp-content/uploa</span><span class="invisible">ds/2022/06/Mashey.IEEE_.Micro_.2022.pdf</span></a></p>
Rafael<p>Look at this gorgeous IBM risc system! I'd love to get it but it's expensive and, honestly, it would just sit on the shelf next my other vintage systems I never use. Maybe someone here wants to give it a good home?<br><a href="https://mastodon.sdf.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a> <a href="https://mastodon.sdf.org/tags/ibm" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ibm</span></a> <a href="https://mastodon.sdf.org/tags/ebay" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ebay</span></a> <a href="https://mastodon.sdf.org/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a> </p><p><a href="https://www.ebay.com/itm/187203744870" rel="nofollow noopener" target="_blank"><span class="invisible">https://www.</span><span class="">ebay.com/itm/187203744870</span><span class="invisible"></span></a></p>
argv minus one<p>In the 1980s, a whole lot of computer and CPU vendors introduced shiny new <a href="https://mastodon.sdf.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> processors, like ARM, MIPS, POWER, and SPARC. Many of these were quite successful in the video game, workstation, and supercomputer markets.</p><p>Except Intel, whose old-fashioned x86 machines somehow ended up outperforming almost all of the RISCs.</p><p>How did that happen?</p><p><a href="https://mastodon.sdf.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a></p>
Pyrzout :vm:<p>160-core RISC V Board is the m.2 CoProcessor You Didn’t know you needed <a href="https://hackaday.com/2025/07/07/160-core-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">hackaday.com/2025/07/07/160-co</span><span class="invisible">re-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/</span></a> <a href="https://social.skynetcloud.site/tags/Microcontrollers" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Microcontrollers</span></a> <a href="https://social.skynetcloud.site/tags/clustercomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>clustercomputing</span></a> <a href="https://social.skynetcloud.site/tags/CH32V003" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CH32V003</span></a> <a href="https://social.skynetcloud.site/tags/m" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>m</span></a>.2slot <a href="https://social.skynetcloud.site/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V</p>
IT News<p>160-core RISC V Board is the m.2 CoProcessor You Didn’t know you needed - Aside from GPUs, you don’t hear much about co-processors these days. [bitluni] per... - <a href="https://hackaday.com/2025/07/07/160-core-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">hackaday.com/2025/07/07/160-co</span><span class="invisible">re-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/</span></a> <a href="https://schleuss.online/tags/microcontrollers" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>microcontrollers</span></a> <a href="https://schleuss.online/tags/clustercomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>clustercomputing</span></a> <a href="https://schleuss.online/tags/ch32v003" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ch32v003</span></a> <a href="https://schleuss.online/tags/m" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>m</span></a>.2slot <a href="https://schleuss.online/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a>-v</p>
Hacker News<p>Ubuntu 25.10 Raises RISC-V Profile Requirements</p><p><a href="https://www.omgubuntu.co.uk/2025/06/ubuntu-riscv-rva23-support" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">omgubuntu.co.uk/2025/06/ubuntu</span><span class="invisible">-riscv-rva23-support</span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/Ubuntu" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Ubuntu</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V25.10 <a href="https://mastodon.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://mastodon.social/tags/Technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technology</span></a></p>
Blake Patterson<p>Did you know that the 'NT' in Windows NT stood for "Nine Ten"? </p><p>The intended core platform for the OS was the then-expected Intel i910 RISC processor, which was to be the rebranded moniker for the i860 that can be found in the wild. *</p><p>It never came to be due to the i860s terrible handling of context switching -- a capability that a CPU for a multitasking, multiuser workstation OS must be able to do _very_efficiently_. The i860 wasn't. </p><p><a href="https://www.youtube.com/watch?v=WTkFGZqVCM8&amp;t=459s" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">youtube.com/watch?v=WTkFGZqVCM</span><span class="invisible">8&amp;t=459s</span></a></p><p>*** EDIT: Several have pointed to sources indicating differently that NT stood for N10, which was the codename for the i860, so -- N10, N-Ten &gt; NT. </p><p><a href="https://oldbytes.space/tags/TIL" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TIL</span></a> <a href="https://oldbytes.space/tags/WindowsNT" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>WindowsNT</span></a> <a href="https://oldbytes.space/tags/Windows" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Windows</span></a> <a href="https://oldbytes.space/tags/Intel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Intel</span></a> <a href="https://oldbytes.space/tags/i860" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>i860</span></a> <a href="https://oldbytes.space/tags/i910" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>i910</span></a> <a href="https://oldbytes.space/tags/vintagecomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>vintagecomputing</span></a> <a href="https://oldbytes.space/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a> <a href="https://oldbytes.space/tags/OS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OS</span></a> <a href="https://oldbytes.space/tags/techhistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>techhistory</span></a> <a href="https://oldbytes.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://oldbytes.space/tags/x86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>x86</span></a> <a href="https://oldbytes.space/tags/processors" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>processors</span></a> <a href="https://oldbytes.space/tags/computers" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>computers</span></a> <a href="https://oldbytes.space/tags/computinghistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>computinghistory</span></a> <a href="https://oldbytes.space/tags/Microsoft" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Microsoft</span></a></p>
jbz<p>"Have you ever designed your own ISA, built a processor of that ISA on FPGA, and built a compiler for it? Furthermore, have you run an operating system on that processor? Actually, we have."</p><p><a href="https://fuel.edby.coffee/posts/how-we-ported-xv6-os-to-a-home-built-cpu-with-a-home-built-c-compiler" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">fuel.edby.coffee/posts/how-we-</span><span class="invisible">ported-xv6-os-to-a-home-built-cpu-with-a-home-built-c-compiler</span></a></p><p><a href="https://indieweb.social/tags/homebrew" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>homebrew</span></a> <a href="https://indieweb.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a></p>
Wolfgang Stief<p>»Advances in silicon and processing technologies now give us clock speeds in excess of 40 MHz and chips with 1 million transistors!«</p><p>Source: Victor K. L. Huang – High-Performance Microprocessors: The RISC Dilemma, in “IEEE Micro August 1989 <a href="https://mastodon.social/tags/vintagecomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>vintagecomputing</span></a> <a href="https://mastodon.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a> <a href="https://mastodon.social/tags/techhistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>techhistory</span></a></p>
derSammler<p>For your viewing pleasure: the mainboard from a <a href="https://oldbytes.space/tags/digital" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>digital</span></a> <a href="https://oldbytes.space/tags/AlphaStation" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AlphaStation</span></a> 255 and the beautiful 300 MHz Alpha 21064 CPU.</p><p><a href="https://oldbytes.space/tags/RetroComputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RetroComputing</span></a> <a href="https://oldbytes.space/tags/DEC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DEC</span></a> <a href="https://oldbytes.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://oldbytes.space/tags/AXP" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AXP</span></a></p>
Hacker News<p>RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?</p><p><a href="https://www.eetimes.com/risc-v-in-ai-and-hpc-part-1-per-aspera-ad-astra/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">eetimes.com/risc-v-in-ai-and-h</span><span class="invisible">pc-part-1-per-aspera-ad-astra/</span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/AI" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AI</span></a> <a href="https://mastodon.social/tags/HPC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HPC</span></a> <a href="https://mastodon.social/tags/PerAsperaAdAstra" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>PerAsperaAdAstra</span></a> <a href="https://mastodon.social/tags/Technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technology</span></a></p>
Historian Matt<p>The Orange Pi RV2 is a RISC-V development board - HTTAY 125 Sylph</p><p><a href="https://port87.social/tags/httay" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>httay</span></a> <a href="https://port87.social/tags/orangepi" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>orangepi</span></a> <a href="https://port87.social/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a> <a href="https://port87.social/tags/openhardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>openhardware</span></a> <a href="https://port87.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a>-v <a href="https://port87.social/tags/development" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>development</span></a> <a href="https://port87.social/tags/technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>technology</span></a></p><p><a href="https://youtu.be/jt77v-N3ldA?si=CYasJd6ItBYyhiPn" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">youtu.be/jt77v-N3ldA?si=CYasJd</span><span class="invisible">6ItBYyhiPn</span></a></p>
Kevin Karhan :verified:<p><span class="h-card" translate="no"><a href="https://digipres.club/@foone" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>foone</span></a></span> yeah, even <a href="https://infosec.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> ISAs like <a href="https://infosec.space/tags/RUSCv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RUSCv</span></a> have <a href="https://en.m.wikipedia.org/wiki/RISC-V" rel="nofollow noopener" target="_blank">at least 40</a> (<code>RV32E</code>)...</p>
amrtf :neocat_flag_trans:<p>Proud to announce that this instance from right now is running under a ARM64 server and I think that it’s up and running without any huge problem!</p><p>To be specific, I moved from an AMD EPYC VPS to an Ampere Altra Max one, also having more resources on the latter with almost the same cost</p><p><a href="https://social.amr.tf/tags/gotosocial" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>GoToSocial</span></a> <a href="https://social.amr.tf/tags/arm64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM64</span></a> <a href="https://social.amr.tf/tags/arm" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM</span></a> <a href="https://social.amr.tf/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a></p>
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