The current state of hardware memory safety...
#Arm: Top-byte Ignore, Memory Tagging Extension, #CHERI
#RISCV: J extension Pointer Masking, no memory tagging extension standard, CHERI
#Intel: Linear Address Masking, no memory tagging extension, Cryptographic Capability Computing https://dl.acm.org/doi/10.1145/3466752.3480076
#AMD: Upper Address Ignore, no memory tagging extension, I'm not aware of their related research programs
Anything I missed?